PDF) Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices
RTD-based High Speed and Low Power Integrated Circuits RTD-based High Speed and Low Power Integrated Circuits
adding reset function to D Flip FLOP | Forum for Electronics
MC74VHC74 datasheet - Dual D Flip-Flop with Set and Reset. The MC74VHC74
PDF) Resonant Tunneling Diode/HBT D-Flip Flop ICs Using Current Mode Logic-Type Monostable-Bistable Transition Logic Element with Complementary Outputs | Taeho Kim - Academia.edu
KR100682266B1 - Differential output tspc d-type flip flop and frequency divider using it - Google Patents
NB7V52MMNG Datasheet(PDF) - ON Semiconductor
Help me calculate the device size of CML/SCL latch design and simulate the gain of it | Forum for Electronics
D Flip-Flop with Asynchronous Reset
![PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/a9f1b39596e7f08405b62eebe623914a1e5c78d1/2-Figure2-1.png "PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar")
PDF] New RTD-based set/reset latch IC for high-speed mobile D-flip flops | Semantic Scholar
digital logic - Is there a way to change only one of the outputs of a D flip -flop? - Electrical Engineering Stack Exchange
adding reset function to D Flip FLOP | Forum for Electronics
DFF-based CMOS clock divider. | Download Scientific Diagram
High Speed Digital Blocks
NB7V52M Flip-Flop Datasheet pdf - D Flip-Flop. Equivalent, Catalog
PPT - Advantages of Using CMOS PowerPoint Presentation, free download - ID:6880895
Figure 5.21 from Cmos Logic and Current Mode Logic 5.1 Introduction | Semantic Scholar
Circuit configuration of the CML-type SR-latch circuit a Circuit... | Download Scientific Diagram
Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
A 2-GHz, Low Noise, Low Power CMOS Frequency Synthesizer with an LC-tuned VCO for Wireless Communications
adding reset function to D Flip FLOP | Forum for Electronics
An improved current mode logic latch for high‐speed applications - Kumawat - 2020 - International Journal of Communication Systems - Wiley Online Library
Figure 1 from A 45 mW RTD/HBT MOBILE D-Flip Flop IC Operating up to 32 Gb/s | Semantic Scholar
PDF) Novel Differential-Mode RTD/HBT MOBILE-based D-Flip Flop IC
Schematic timing diagram of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
